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Chips lead to problems for semiconductors, the most important industry for our country into the 21st century. Huawei's broken core has led to a sharp decline in global sales of Huawei's cell phone industry. From this we can see the big problem of the lack of chips.

Over the past few months, some of these issues have been partially resolved, but the largest gaps have not yet been closed. But it is also slowly closing that distance. Let's take a look at it together.

Breaking through the equipment supply chain

The main avenue that limits our access to semiconductors is equipment. While there is a trilateral agreement to prevent us from buying DUV lithography, there is no mention of how far that goes.DUV is a very broad technology.

Nikon released the first DUV tool using KrF lithography in 1988, called the NSR-1505EX. it initially had a resolution of 500 nm, but over time it was upgraded to 250 nm with a 100 nm overlay.

In the Rayleigh Criterion equation (CD = k1 - λ / NA), CD is the critical size, i.e., the smallest possible feature size. λ is the wavelength of the light used. NA is the numerical aperture of the optical device.

Self-Aligned Quadrilateral Patterning (SAQP) is often considered the most economical way to extend DUV lithography generations. While more complex lithography solutions are available, the current economically viable solution will be adhered to. However, TSMC and China's SMIC have already realized 7nm process technology.

SAQP using ArFi lithography (NA=1.35, λ=193nm) can produce this feature size at k1 of 0.391. If the goal is to prevent our country from realizing 5nm process technology, then ArFi shipments must be prevented.ASML and Nikon can make ArFi lithography tools with a minimum metal pitch of 28nm. While this will not be as cost effective as EUV, it is not unattainable for our country.

If the goal is to prevent the country from achieving high-volume production of 7nm process technology, then all tools with a minimum metal pitch of 40nm that can be used on TSMC's 7nm-class process technology must be blocked. The new restrictions would include ArFi lithography, but they would need to be extended further.

SAQP using dry argon fluoride ArF lithography (NA=0.93, λ=193nm) can produce this feature size with a k1 of 0.385. Again, this would not be as economical as the ArFi DUV "7nm" of Intel, TSMC and SMIC, which is achievable.

If it is to prevent our country from scaling up its high-volume 14-nanometer process technology, then all tools that can achieve the smallest metal pitch of 64 nanometers used on the node must be blocked, such as TSMC's 16-nanometer and 12-nanometer and Samsung's 14-nanometer. But that's already been addressed.

SAQP uses state-of-the-art KrF lithography (NA=0.93, λ=248nm) to produce such feature sizes with a k1 of 0.48. SAQP uses mid-range KrF lithography (NA=0.8, λ=248nm) to create feature sizes with a k1 of 0.413. These goals can be achieved very easily using tools from ASML, Nikon or Canon.

In photolithography, overlap refers to the accuracy of alignment between different layers during the manufacturing process. It is the positional accuracy with which one layer is aligned with another. Each of our examples uses self-aligned quadrilateral patterning (SAQP), which means that 4 layers of lithography need to be aligned. Therefore, coverage control is critical.

ASML's state-of-the-art EUV stepper has an overlay accuracy of 1.1 nanometers. The previous version, the 3400C, which was their primary EUV tool shipped in 2021, had a stacking accuracy of 1.5 nm. This is worse than ASML's state-of-the-art DUV tool, the 2100i.

Breaking through the chemical supply chain

The next gap in the new export controls is in the chemical supply chain, namely photoresists. We delved into photoresists here, but the summary is that lithography tools need photoresists to pattern features on wafers.

The vast majority of the world's photoresists are produced by a handful of Japanese companies, with DuPont being the fourth-ranked competitor. In many cases, the photoresist chemistry involves a great deal of fine-tuning with the end customer regarding the type of lithography, the process node, the type of features, and the feature size. In addition, the equipment used to deposit, develop and bake the photoresist is entirely Japanese.

But SMIC alone has over a hundred DUV tools. These can be reorganized and transferred to fabricate different process nodes. With the existing DUV tools alone, SMIC can achieve 7nm foundry capacity of over 100,000 wafers per month. This is more than the combined advanced node (<=7nm) foundry capacity of Samsung and Intel.

If all the DUV tools of Chinese companies such as Huahong, Shanghai Huali, Changjiang Storage, Changxin Storage, GTA Semi, Nexchip, Yandong, Nexperia, CR Micro, Sien, Fulsemi, SEMC, NSEMI, etc. are reoccupied by SMIC, the 7nm capacity they can build will far exceed even TSMC's 7nm.

Final breakthrough in the component supply chain

What finally led to the last gap was i.e. the component supply chain. the DUV tools had to be serviced by ASML, Nikon and Canon with regular replacement parts.

But our lithography champion SMEE has now gotten a breakthrough, as SMEE has delivered a usable I-Line lithography tool, hisDelivery of the first gold bump sealing lithography machine (SMEE)Their argon fluoride DUV lithography technology is also production-ready for front-end wafer fabrication.

This means we are catching up with the chip path. Many companies in the ASML lithography supply chain, such as Zeiss, continue to slowly mature our chip technology through joint ventures and technology transfer as well. We will be able to reconfigure existing equipment and accelerate the development of domestic lithography. By then Huawei's Kirin chips will no longer be blocked.

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